1. Technical Field
The embodiments described herein relate to a semiconductor integrated circuit (IC), and more particularly, to a reset signal generator and a method for generating a reset signal of a semiconductor IC.
2. Related Art
Generally, a semiconductor IC is commonly uses an internally generated power-up signal for initializing the semiconductor IC in order to perform a stable operation. However, a level of the power-up signal may fluctuate according to fluctuations of a slope and a process/voltage/temperature (PVT) when power is supplied from an exterior of the IC, such that the power-up signal is not suitable for stably initializing the semiconductor IC. Thus, some semiconductor ICs, i.e., a memory group above Graphics Double Data Rate 3 (GDDR3), use a method in which an external memory controller determines whether power is stable in order to supply a reset signal ‘RES’ to the semiconductor IC, as shown in FIG. 1.
However, when the memory controller supplies the reset signal ‘RES’ to the semiconductor IC, a separate pin for receiving the reset signal ‘RES’ and a circuit configuration for controlling the reset signal ‘RES’ must be included in the semiconductor IC. Furthermore, since the size of the semiconductor IC is gradually decreasing, the addition of the separate pin and the circuit configuration for the reset signal ‘RES’ is problematic in that it inhibits the reduction in size of the semiconductor IC. The determination on whether power is stable is performed at the exterior of the semiconductor IC. Accordingly, the stability of the semiconductor IC is questionable when a difference exists between the desired power and the actual power being used inside the semiconductor IC.